Cstyle的UEFI导读：第20.0篇 IGD OpRegion interface && IGD OpRegion PROTOCOL

    ACPI IGD OpRegion interface是用SCI来实现IGD driver,OS,BIOS之间沟通的桥梁,IGD OpRegion PROTOCOL是UEFI BIOS构建桥梁的脊梁。

Legacy的实现方式下与OS沟通的方式：

OpRegion Memory Layout：

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Mailbox1其中提供的Public ACPI Methods能够从ACPI spec Appendix B Video Extensions里面找到相应的每个method。它为IGD graphics devices提供了一个标准的ACPI规定的沟通渠道。

Mailbox2当值提供了IGD graphic driver怎样通过SWSCI与BIOS沟通的port信息。

Mailbox3，ASLE （ASL event）Support。This is the mailbox for communicating all driver features related information between the  driver
and the SBIOS

ASL Storage Register，用来存储IGD OpRegion Header地址：

IGD与BIOS沟通（SCI）：

SWSCI Register，IGD通过DMI向ICH发送SCI来触发TCOSCI_STS bit in its GPE0 register来触发真正的SCI event。然后通过BIOS里面定义的ASL _Lxx method来处理,同一时候通过Mailbox2来传递消息。主要是在触发SCI之前预先填好mailbox里面相应的參数，包含Function-Code等信息
，然后触发SCI，在L_xx method其中会去读取mailbox2其中的对应字段，来做对应的处理。最后通过另外的一些字段来返回处理的结果和状态。（TCO：total cost of ownership.Ref intel EDS）

    Under the new scheme, rather than writing to the SWSMI bit (bit 0 of the SWSMI register

at offset 0xe0 in the PCI configuration space of the graphics device), the graphics driver

writes to the SWSCI register (bit 0, offset 0xe8 assuming SWSCI is configured for SCI

operation).

    This register serves two purposes:

1) Support selection of SMI or SCI event source (SMISCISEL - bit15)

2) SCI Event trigger (GSSCIE – bit 0)

To generate a SW SCI event, software (system BIOS/graphics driver) should program bit

15 (SMISCISEL) to 1. This is typically programmed once (assuming SMIs are never

triggered).

On a write transition of 0->1 of bit 0 of this register, the GMCH sends a single SCI

message down the DMI link to ICH. ICH will set the DMISCI bit in its TCO1_STS register

and TCOSCI_STS bit in its GPE0 register, upon receiving this message from DMI. The

corresponding SCI event handler in BIOS is to be defined as an _Lxx method.

Once written as 1, software must write a "0" to this bit to clear it.

All other write transitions (1->0, 0->0, 1->1) will be ignored. Writes will likewise be

ignored if bit 15 is 0.

To generate an SW SMI event, software should program bit 15 to 0 and trigger SMI

through writes to SWSMI register (see SWSMI register for programming details).

   

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Video BIOS Table（VBT）

    这个就是我们常见的所谓的使用BMP工具来配置VBIOS/GOP的时候生成的一个bin档案，终于会被包在BIOS rom里面，在post过程其中由BIOS来读取到内存里面去，跟上面的各种Mailbox（一般由ASL code，IgdoPRn.Asl来创建）一起构成IGD
OpRegion table，这部分通常是由 IGD OpRegion PROTOCOL &ACPI Protocl来完毕。终于生成的table被video BIOS and device driver来读取，获取当前硬件的各种信息：Flat  Panel Timings, Generic Mode Timing, GPIO pins, Clock等。table能够在post其中依据用户在setup里面的设定值或者是platformPolicy来动态的改变（table被保存在

EFI_GLOBAL_NVS_AREA->IgdOpRegionAddress：IgdOpRegion其中被ACPI driver来读取）。以此来实现用户的不同定制（參考IgdOprom.c）。

IGD OpRegion PROTOCOL

    这里提到的protocol就是用来创建IgdOpRegionTable的DXE driver，它为VBIOS/GOP以及IGD driver提供相关的信息。主要是从FV里面读取BMP配置生成的Bin
file以及platform policy以及setup值来定制系统的各种參数，并辅助acpi driver 来创建acpi table（GNVS->ASLB）。

    好了今天就先记录到这里,详情可參考ACPI spc，Intel IgdOpRn spc,以及相关的spc。

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