用vivado实现4比特加法器

 `timescale 1ns / 1ps
 module add_4_beha(
     a,
     b,
     cin,
     sum
     );
     input [:] a;
     input [:] b;
     input cin;
     output sum;
     wire [:]a;
     wire [:]b;
     wire  cin;
     reg [:] sum;

     always @ (a or  b or cin)
         begin
             sum = a + b + cin;
         end
 endmodule

测试testbench：

`timescale 1ns / 1ps
module add_4_beha_tb;

reg [:] a,b;
reg cin;
wire [:] sum;

initial
$monitor ("a = %b, b = %b, cin = %b, sum = %b",a, b, cin, sum);

initial
begin
    #      a = 'b1100;
            b = 'b0100;
            cin = 'b0;
    #     a = 'b1100;
            b = 'b0110;
            cin = 'b1;
    #     a = 'b0010;
            b = 'b0101;
            cin = 'b1;
     #    a = 'b1000;
            b = 'b1010;
            cin = 'b0;
     #    $stop;
 end

 add_4_beha inst(
    .a(a),
    .b(b),
    .cin(cin),
    .sum(sum)
 );
endmodule

不知道你有没有发现规律，这里的电路很复杂，但是描述语言不管内部结构，直接描述出其行为。

在测试单元中，直接简单的赋值，似乎更简单。我抓不到硬件的奥秘！