systemverilog(3)之Randomize

what to randomize?

(1) primary input data <==one data

(2)encapsulated input data <== muti group data

(3)protocol exceptions,errors and violations

(4)delays

---

overview

1.randomization enables users to automatically  generate random input sitimuls for functional verification

2.systemverilog enable user to specify random constrained (legal) values

3.random costraint should be specified using OOP

---

Randomization in SV

(1) keyword

rand bit [1:0] y;

randc bit [1:0] y;

(2)simple class with random variables

class BUS

rand bit [15:0] addr;

randc bit [31:0] data;

constraint range1{

addr > 1024;

data<16384;

}

endclass

(3)randomize() function <==启动一个随机约束

if success return 1

if failture  return 0

BUS bus = new();

repeat(50) begin

if(bus.randomize() == 1)

$display(bus.addr.bus.data);

else

$display(“randomization failed”);

end

(4) constrain solver ===> seed

the same seed results in the same random value

(5)constraint blocks

constraint constraint_indentifier {

constraint_statmemts

}

(6)simples expressions

only one relational operator(< <= > >= …)

(7)set membership operator:inside

eg1:   class BUS

rand bit[15:0] addr;

randc bit [31:0] data;

constraint range1{

addr inside {[0:1000],[1024:16384]};

data > 1000;

data < 100000;

}

endclass

eg2:

integer fives[0:3] = {5,10,15,20};

rand integer v;

constraint c3 {v inside fives};

constraint c4 !{v inside fives};

(8)weighted distribution:dist

property1: They are a relational test for test membership

property2: They specify a statistical distribution function for the result

:=  <====the same value in the range  every（可以对一个区间也可以对一个独立的数）

/=  <=====to be equally divided by all values     range_weight/n(对一个区间约束)

cannot be used with a randc

eg:

(9)bidirectional constraints

not procedural but declarative

all active at one time

(10) conditional constraints

implication operator –>  相当于 if..else

(11) unconstrainted

rand bit x ;

rand bit [1:0] y;

the same probability

(12)implication

class imp1;

rand bit x;

rand bit [1:0] y;

constraint c_xy{

(x==0) –> (y==0);

}

endclass

(13)implication and bidirectional constraints

class imp_Bid;

rand bit x;

rand bit [1:0] y;

constraint c_xy{

y > 0;

(x==0) –> (y==0);

}

endclass

(14)solve before

class solvebefore;

rand bit x;

rand bit [1:0] y;

constraint c_xy;

{

(x==0) –> y==0;

solve y before x;

}

(15) interative constraints

allows arrayed variable to be constrained in a parameterized manner using loop variables

class c;

rand bye A[4];

constraint C1

{

foreach(A[i])

A[i] inside{2,4,8,16};

}

constraint C2

{

foreach (A[j])

A[j] > 2*j;

}

endclass

(16) functions in constraints

class B;

rand int x,y;

constraint C{x <= F(y);}

constraint D{y inside{2,4,8};}

endclass

1.functions cannot contain output or ref arguments <===ref 相当于inout

2.functions should be automatic  <===automatic可以立即返回值

3.functions that appear  in constraint cannot modify the constraint <===只是简单调用而已

4.functons shall be called before constraints are solved, and their return values shall be treated as state variables

5.random variables used as function argumets shall establish an implicit variable ordering or priority

（17）in_line constraints ---xx.randomize()with{constraints_statememt}

equivalent to adding an extra constraint to any existing one in effect

(18) disabling  random variables ---rand_mode() <==control a random variable is active or inactive

class packed;

rand integer src,dst;

endclass

int r;

packet packect_a=new;

packet_a.rand_mode(0);

packet_b.src.rand_mode(1);

(19)controlling constraints with constraint_mode() <===control a constraints is active or inactive

class packet;

rand interger src,dst;

constraint filter{src>2*dst;}

endclass

function integer toggle_rand(packet p);

if(p.filter.constraint_mode() ==1 )

p.filter.costraint_mode(0);

else

p.filter.constraint_mode(1);

toggle_rand = p.randomize();

endfunction

总结：constraints主要用于transaction中，