interrupt & storage & DMA
1.Interrupt:
The occurrence of an event is usually signaled by aninterrupt from either the hardware or thesoftware. Hardware may trigger an interrupt at any time by sending a signal to the CPU,usually by way thesystem bus. Software may trigger an interrupt by executing a special
operation called a system call(also called a monitor call).
2.storage:
The CPU can load instructions only from memory, so any programs to run must be stored there.General-purpose computers run most of their programs from rewriteabe memory,called main memory(also called random-access memory or RAM). The bootstrap program is typically stored in read-only memory(ROM) or electrically erasable programmable read-only memory (EEPROM). Because ROM cannot be changed,only static
programs are stored there. The unchangeable nature of ROM is of use in game cartridges(盒式磁盘),so manufacturers can distribute games that cannot be modified.
All forms of memory provide an array of words, or storage units.Each word has its own address. Interaction is achieved through a sequence of load or store instructions to specific memory addresses. The load instruction moves a word from main memory to an internal register within the CPU, whereas the store instruction moves the content of a register to main memory.Aside from explicit loads and stores, the CPU automatically loads instructions from main memory for execution.
3.von Neumann's Architecture:
Most modern computer system are based on the von Neumann architecture . In such an architecture, both programs and data are stored in main memory, which is managed by a CPU. A typical instruction-execution cycle ,as executed on such a system, first fetches an instruction from memory and stores that instruction in the instruction register.The instruction is then decoded and may cause operands(操作数) to be fetched from memory and stored in
some internal register. After the instruction on the operands has been executed, the result may be stored back in memory. Notice that the memory unit sees only a stream of memory addresses; it does not know how they are generated or what they are for. Accordingly, we can ignore how a memory address is generated by a program. we are interested only in the sequence of memory addresses generated by the running program.
Ideally, we want the programs and data to reside in main memory permanently. This arrangement usually is not possible, for two reasons:
1. Main memory is usually too small to store all needed programs and data permanently.
2. Main memory is a volatile(挥发性的,不稳定的) storage device that loses its contents when power is turned off or otherwise lost.
Thus, most computer systems provide secondary storage as an extension of main memory. The main requirement for secondary storage is that it be able to hold large quantities of data permanently. The most common secondary-storage device is a magnetic disk,which provides storage for both programs and data. Most programs (system and application) are stored on a disk until they are loaded into memory. Many programs then use the disk as both the source and the destination of their processing.
4.DMA (direct memory access)
To start an I/O operation, the device driver loads the appropriate registers within the device controller. The device controller, in turn, examines the contents of these registers to determine what action to take (such as“read a character from the keyboard”). The controller starts the transfer of data from the device to its local buffer. Once the transfer of data is complete, the device controller informs the device driver via an interrupt that it has finished its operation. The device driver then returns control to the operating system, possibly returning the data or a pointer to the data if the operation was a read. For other operations, the device driver returns status information.
This form of interrupt-driven I/O is fine for moving small amounts of data but can produce high overhead when used for bulk data movement such as disk I/O. To solve this problem,direct memory access (DMA)is used. After setting up buffers, pointers, and counters for the I/O device, the device controller transfers an entire block of data directly to or from its own buffer storage to memory, with no intervention by the CPU. Only one interrupt is generated per block, to tell the device driver that the operation has completed, rather than the one interrupt per byte generated for low-speed devices. While the device
controller is performing these operations, the CPU is available to accomplish other work.
Some high-end systems use switch rather than bus architecture. On these systems, multiple components can talk to other components concurrently, rather than competing for cycles on a shared bus. In this case,DMA is even more effective. Figure 1.5 shows theinterplay of all components of a computer system.
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