1.Interrupt:

The occurrence of an event is usually signaled by aninterrupt from either the hardware or thesoftware. Hardware may trigger an interrupt at any time by sending a signal to the CPU,usually by way thesystem bus. Software may trigger an interrupt by executing a special

operation called a system call(also called a monitor call).

2.storage:

The CPU can load instructions only from memory, so any programs to run must be stored there.General-purpose computers run most of their programs from rewriteabe memory,called main memory(also called random-access memory or RAM). The bootstrap program is typically stored in read-only memory(ROM) or electrically erasable programmable read-only memory (EEPROM). Because ROM cannot be changed,only static

programs are stored there. The unchangeable nature of ROM is of use in game cartridges(盒式磁盘),so manufacturers can distribute games that cannot be modified.

All forms of memory provide an array of words, or storage units.Each word has its own address. Interaction is achieved through a sequence of load or store instructions to specific memory addresses. The load instruction moves a word from main memory to an internal register within the CPU, whereas the store instruction moves the content of a register to main memory.Aside from explicit loads and stores, the CPU automatically loads instructions from main memory for execution.

3.von Neumann's Architecture:

Most modern computer system are based on the von Neumann architecture . In such an architecture, both programs and data are stored in main memory, which is managed by a CPU. A typical instruction-execution cycle ,as executed on such a system, first fetches an instruction from memory and stores that instruction in the instruction register.The instruction is then decoded and may cause operands(操作数) to be fetched from memory and stored in

some internal register. After the instruction on the operands has been executed, the result may be stored back in memory. Notice that the memory unit sees only a stream of memory addresses; it does not know how they are generated or what they are for. Accordingly, we can ignore how a memory address is generated by a program. we are interested only in the sequence of memory addresses generated by the running program.

Ideally, we want the programs and data to reside in main memory permanently. This arrangement usually is not possible, for two reasons:

1. Main memory is usually too small to store all needed programs and data permanently.

2. Main memory is a volatile(挥发性的,不稳定的) storage device that loses its contents when power is turned off or otherwise lost.

Thus, most computer systems provide secondary storage as an extension of main memory. The main requirement for secondary storage is that it be able to hold large quantities of data permanently. The most common secondary-storage device is a magnetic disk,which provides storage for both programs and data. Most programs (system and application) are stored on a disk until they are loaded into memory. Many programs then use the disk as both the source and the destination of their processing.

4.DMA (direct memory access)

To start an I/O operation, the device driver loads the appropriate registers within the device controller. The device controller, in turn, examines the contents of these registers to determine what action to take (such as“read a character from the  keyboard”). The controller starts the transfer of data from the device to its local buffer. Once the transfer of data is complete, the device controller informs the device driver via an interrupt that it has finished its operation. The device driver then returns control to the operating system, possibly returning the data or a pointer to the data if the operation was a read. For other operations, the device driver returns status information.

This form of interrupt-driven I/O is fine for moving small amounts of data but can produce high overhead when used for bulk data movement such as disk I/O. To solve this problem,direct memory access (DMA)is used. After setting up buffers, pointers, and counters for the I/O device, the device controller transfers an entire block of data directly to or from its own buffer storage to memory, with no intervention by the CPU. Only one interrupt is generated per block, to tell the device driver that the operation has completed, rather than the one interrupt per byte generated for low-speed devices. While the device
controller is performing these operations, the CPU is available to accomplish other work.

Some high-end systems use switch rather than bus architecture. On these systems, multiple components can talk to other components concurrently, rather than competing for cycles on a shared bus. In this case,DMA is even more effective. Figure 1.5 shows theinterplay of all components of a computer system.

interrupt & storage & DMA的更多相关文章

  1. STM32 HAL drivers < STM32F7 >

    Overview of HAL drivers The HAL drivers were designed to offer a rich set of APIs and to interact ea ...

  2. 八、mini2440裸机程序之UART(1)简单介绍【转】

    转自:http://blog.csdn.net/shengnan_wu/article/details/8298869 一.概述          S3C2440通用异步接收和发送(UART)提供了三 ...

  3. 阅读ARm芯片手册 阅读方法

    一 overview 1 table of contents -*** 2 product overview -***  芯片概述 3 feature  ***    每一个功能的特点 4 block ...

  4. S3C2410中文芯片手册-11.串口

    目录 11 UART Overview Featrues UART Operation Data Transmission Data Reception Auto Flow Control(AFC) ...

  5. 基于ARM的SoC设计入门[转]

    原文:基于ARM的SoC设计入门 我们跳过所有对ARM介绍性的描述,直接进入工程师们最关心的问题.要设计一个基于ARM的SoC,我们首先要了解一个基于ARM的SoC的结构.图1是一个典型的SoC的结构 ...

  6. Qemu/kvm虚拟化源码解析学习视频资料

    地址链接:tao宝搜索:Linux云计算KVM Qemu虚拟化视频源码讲解+实践​https://item.taobao.com/item.htm?ft=t&id=646300730262 L ...

  7. 【SPI】Polling Interrupt DMA

    三種將資料在I/O間傳送的方法有 1. Polling2. Interrupt-driven I/O3. DMA(Direct Memory Access) Polling:最簡單的方式讓I/O de ...

  8. 第九章 Mass Storage设备

    9.1 Mass Storage设备介绍 USB的Mass Storage类是USB大容量储存设备类(Mass Storage Device Class).专门用于大容量存储设备,比如U盘.移动硬盘. ...

  9. Optimizing TLB entries for mixed page size storage in contiguous memory

    A system and method for accessing memory are provided. The system comprises a lookup buffer for stor ...

随机推荐

  1. Linux下高并发网络编程

      Linux下高并发网络编程 1.修改用户进程可打开文件数限制 在Linux平台上,无论编写客户端程序还是服务端程序,在进行高并发TCP连接处理时, 最高的并发数量都要受到系统对用户单一进程同时可打 ...

  2. 【转】JNI 对象处理

    原文网址:http://leidiqiu.iteye.com/blog/720307 JNI 的基本问题就是解决 Java 和 C++ 代码互相调用的通信问题,在 C++ 代码编写过程中最大的问题莫过 ...

  3. 【最短路】【数学】CSU 1806 Toll (2016湖南省第十二届大学生计算机程序设计竞赛)

    题目链接: http://acm.csu.edu.cn/OnlineJudge/problem.php?id=1806 题目大意: N个点M条有向边,给一个时间T(2≤n≤10,1≤m≤n(n-1), ...

  4. 【有源汇上下界最大流】ZOJ 3229 Shoot the Bullet

    题目链接: http://acm.zju.edu.cn/onlinejudge/showProblem.do?problemCode=3229 题目大意: n天给m个女孩拍照(1<=n<= ...

  5. sql server 删除索引的语句

    DROP INDEX index_name ON talbe_nameDROP INDEX IX_TBlueyBook_10 ON 表名

  6. Rules

    我们之前处理异常的时候用到过Rules,当然还有很多其他规则.Rules允许弹性的添加或者重定义测试方法的行为.测试者可以重复使用或者扩展下面的某一个Rules,也可以写一个属于自己的规则. 这里先展 ...

  7. 理解RESTful架构(转)

    理解RESTful架构   作者: 阮一峰 http://www.ruanyifeng.com/blog/2011/09/restful 越来越多的人开始意识到,网站即软件,而且是一种新型的软件. 这 ...

  8. Hibernate学习笔记(一):级联删除

    一对多的关系映射 在一的一方配置文件中将会配置set节点信息: *.hbm.xml配置文件中set节点的属性: Lazy:默认是true 即使用延迟加载,false表示即时加载: Order-by:一 ...

  9. Java三十个面试题总结

          都是一些非常非常基础的题,是我最近参加各大IT公司笔试后靠记忆记下来的,经过整理献给与我一样参加各大IT校园招聘的同学们,纯考Java基础功底,老手们就不用进来了,免得笑话我们这些未出校门 ...

  10. 在树莓派1B上编译安装lnmp服务器

    最近一周给部门内部搭建考试系统,选择使用PHPEMS.这是个开源的系统,唯一缺点是PHP的版本比较低,只能使用5.2或5.3.而我的树莓派系统更新后使用apt-get安装得到的PHP版本为5.4.由于 ...