[翻译]内存一致性模型 --- memory consistency model

I will just give the analogy with which I understand memory consistency models (or memory models, for short). It is inspired by Leslie Lamport's seminal paper "Time, Clocks, and the Ordering of Events in a Distributed System". The analogy is apt and has fundamental significance, but may be overkill for many people. However, I hope it provides a mental image (a pictorial representation) that facilitates reasoning about memory consistency models.

我会给出一个我理解的内存一致性模型(简称内存模型)的比喻。灵感来自Leslie Lamport的开创性论文“时间，时钟和分布式系统中事件的顺序”。比喻很简单，其中包含了(内存模型的)基本意义，对不少人来说可能有点矫枉过正。不管怎么说，我期望它可以提供一种图景(图形呈现)以促进理解内存一致性模型。

Let’s view the histories of all memory locations in a space-time diagram in which the horizontal axis represents the address space (i.e., each memory location is represented by a point on that axis) and the vertical axis represents time (we will see that, in general, there is not a universal notion of time). The history of values held by each memory location is, therefore, represented by a vertical column at that memory address. Each value change is due to one of the threads writing a new value to that location. By a memory image, we will mean the aggregate/combination of values of all memory locations observable at a particular time by a particular thread.

我们可以通过空间-时间图来看一下全部内存位置的历史。其中横轴表示地址空间(每个内存位置是由在该轴上的点表示)，纵轴表示时间(通常来说时间没有通用的概念)。因而，每个内存位置存储值的历史由该内存地址的垂直柱表示。每个值的变化是因为某个线程为该内存位置赋新值引起。通过内存图，我们可以观察特定线程在特定时间全部内存地址上值的汇总/组合情形。

Quoting from "A Primer on Memory Consistency and Cache Coherence"

The intuitive (and most restrictive) memory model is sequential consistency (SC) in which a multithreaded execution should look like an interleaving of the sequential executions of each constituent thread, as if the threads were time-multiplexed on a single-core processor.

引自“存储一致性和Cache一致性入门”

直观的(也是最严格的)内存模型是顺序一致性。多线程的执行应该看起来是每个线程顺序执行的交织，仿佛线程在单核处理器上的时间复用。

That global memory order can vary from one run of the program to another and may not be known beforehand. The characteristic feature of SC is the set of horizontal slices in the address-space-time diagram representing planes of simultaneity (i.e., memory images). On a given plane, all of its events (or memory values) are simultaneous. There is a notion of Absolute Time, in which all threads agree on which memory values are simultaneous. In SC, at every time instant, there is only one memory image shared by all threads. That's, at every instant of time, all processors agree on the memory image (i.e., the aggregate content of memory). Not only does this imply that all threads view the same sequence of values for all memory locations, but also that all processors observe the samecombinations of values of all variables. This is the same as saying all memory operations (on all memory locations) are observed in the same total order by all threads.

全局内存顺序可以从程序的一个运行到另一个运行，并且可能事先不知道。顺序一致性(SC)的特点是在地址空间图中代表平面性水平切片的集合（即存储图像）。在一个给定的平面上，它所有的事件（或内存值）是同时发生的。有一个绝对时间的概念，其中所有的线程都认同内存值是同时的；在顺序一致性(SC)中，每一个时刻，所有线程共享唯一一个内存图像。也就是说，在每一个瞬间的时间，所有的处理器都认同的内存映像（即，内存的总含量）. 这不仅意味着，在全部内存位置上，所有的线程查看到的值的顺序是相同的，而且全部的处理器观察到的所有变量的值的组合都是一样的。换句话说，全部线程的所有内存操作（在所有的内存位置）看起来是在一个相同的总的顺序里。