STM32片外SRAM作运行内存

本例演示用的软硬件：

• 片内外设驱动库：STM32CubeF41.24.1的HAL库1.7.6，2019年4月12日
• IDE：MDK-ARM 5.28.0.0，2019年5月
• 开发板：片外SRAM挂在FSMC_NORPSRAM3，16bit×2¹⁹=1MiB

本例的目的是让编程人员使用片外SRAM就像使用片内SRAM一样，即不用把任何变量声明到指定的RAM地址、连接器也能自动地把片外SRAM作为变量的存储空间
如果把所有需要被放到片外SRAM的变量用__attribute__((at()))、指针等声明到片外SRAM，那么完全不用像本例这样

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执行main()前执行片内Flash上初始化FSMC及其GPIO的指令：

• 有些指令由启动文件的汇编代码生成，例如对于本例的STM32F407ZG来说这个启动文件就是startup_stm32f407xx.s(默认版本位于STM32CubeF4\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm)
• 有些函数在system_stm32f4xx.c(位于STM32CubeF4\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\)

对于本例的STM32F407来说修改上述的2个源文件的方法是：

1.换用官方的使用片外SRAM作运行内存的例程的启动文件
例如STM32CubeF4\Projects\STM324xG_EVAL\Examples\FSMC\FSMC_SRAM_DataMemory\MDK-ARM\startup_stm32f407xx.s
可以看到适用于使用片外SRAM运存的启动文件相较于默认版本的启动文件变化的地方有

• 第52行、第75行：定义用于初始化片外SRAM的栈
• 第191行~第192行：在执行main()前、执行完启动文件定义的指令后将栈顶指针恢复为默认值

 __initial_spTop EQU    0x20000400                 ; stack used for SystemInit & SystemInit_ExtMemCtl

 __Vectors       DCD     __initial_spTop            ; Top of Stack

 __Vectors_End

 __Vectors_Size  EQU  __Vectors_End - __Vectors

                 AREA    |.text|, CODE, READONLY

 ; Reset handler
 Reset_Handler    PROC
                  EXPORT  Reset_Handler             [WEAK]
         IMPORT  SystemInit
         IMPORT  __main

                  LDR     R0, =SystemInit
                  BLX     R0
                  LDR     R0, =__initial_sp          ; restore original stack pointer
                  MSR     MSP, R0
                  LDR     R0, =__main
                  BX      R0
                  ENDP

2.取消注释system_stm32f4xx.c的第96行

 /************************* Miscellaneous Configuration ************************/
 /*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
  || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
  || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
 /* #define DATA_IN_ExtSRAM */
 #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
           STM32F412Zx || STM32F412Vx */

那么system_stm32f4xx.c的

• 第662行~第716行
  • 开启FSMC模块用到的GPIO的时钟(第662行)
  • 配置相应GPIO口的模式、速度等信息(第667行~第712行)
  • 开启FSMC模块的时钟(第716行))
• 第737行~第741行
  • 配置FSMC_NORPSRAM的控制、时序(第739行~第741行)

都会被执行

 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
  || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
  || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)

 #if defined(DATA_IN_ExtSRAM)
 /*-- GPIOs Configuration -----------------------------------------------------*/
    /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
   RCC->AHB1ENR   |= 0x00000078;
   /* Delay after an RCC peripheral clock enabling */
   tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);

   /* Connect PDx pins to FMC Alternate function */
   GPIOD->AFR[]  = 0x00CCC0CC;
   GPIOD->AFR[]  = 0xCCCCCCCC;
   /* Configure PDx pins in Alternate function mode */
   GPIOD->MODER   = 0xAAAA0A8A;
   /* Configure PDx pins speed to 100 MHz */
   GPIOD->OSPEEDR = 0xFFFF0FCF;
   /* Configure PDx pins Output type to push-pull */
   GPIOD->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PDx pins */
   GPIOD->PUPDR   = 0x00000000;

   /* Connect PEx pins to FMC Alternate function */
   GPIOE->AFR[]  = 0xC00CC0CC;
   GPIOE->AFR[]  = 0xCCCCCCCC;
   /* Configure PEx pins in Alternate function mode */
   GPIOE->MODER   = 0xAAAA828A;
   /* Configure PEx pins speed to 100 MHz */
   GPIOE->OSPEEDR = 0xFFFFC3CF;
   /* Configure PEx pins Output type to push-pull */
   GPIOE->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PEx pins */
   GPIOE->PUPDR   = 0x00000000;

   /* Connect PFx pins to FMC Alternate function */
   GPIOF->AFR[]  = 0x00CCCCCC;
   GPIOF->AFR[]  = 0xCCCC0000;
   /* Configure PFx pins in Alternate function mode */
   GPIOF->MODER   = 0xAA000AAA;
   /* Configure PFx pins speed to 100 MHz */
   GPIOF->OSPEEDR = 0xFF000FFF;
   /* Configure PFx pins Output type to push-pull */
   GPIOF->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PFx pins */
   GPIOF->PUPDR   = 0x00000000;

   /* Connect PGx pins to FMC Alternate function */
   GPIOG->AFR[]  = 0x00CCCCCC;
   GPIOG->AFR[]  = 0x000000C0;
   /* Configure PGx pins in Alternate function mode */
   GPIOG->MODER   = 0x00085AAA;
   /* Configure PGx pins speed to 100 MHz */
   GPIOG->OSPEEDR = 0x000CAFFF;
   /* Configure PGx pins Output type to push-pull */
   GPIOG->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PGx pins */
   GPIOG->PUPDR   = 0x00000000;

 /*-- FMC/FSMC Configuration --------------------------------------------------*/
   /* Enable the FMC/FSMC interface clock */
   RCC->AHB3ENR         |= 0x00000001;

 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
    || defined(STM32F412Zx) || defined(STM32F412Vx)
   /* Delay after an RCC peripheral clock enabling */
   tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
   /* Configure and enable Bank1_SRAM2 */
   FSMC_Bank1->BTCR[]  = 0x00001011;
   FSMC_Bank1->BTCR[]  = 0x00000201;
   FSMC_Bank1E->BWTR[] = 0x0FFFFFFF;

从system_stm32f4xx.c的第738行的注释可知，第739行~第741行分别配置的是FSMC_NORPSRAM2的控制寄存器、读写时序寄存器、写时序寄存器，而我使用的开发板的片外SRAM挂在FSMC_NORPSRAM3，所以需要修改system_stm32f4xx.c上述的写GPIO寄存器、FSMC寄存器的代码，获取正确的寄存器值的方法是核外片内外设只开启FSMC_NORPSRAM3及其GPIO，再在硬件调试过程中复制出相应的寄存器值

3.更正system_stm32f4xx.c的上述代码

(再次提醒没仔细读题的读者：下文的代码只被保证适用于( (STM32F407ZG) && (片外SRAM挂在FSMC_NORPSRAM3) && (片外SRAM是16bit×219=1MiB) )的情况，且应该根据你用的SRAM芯片、STM32的AHB总线时钟频率等信息修改第739行~第741行配置FSMC寄存器用的值。用上一段提到的方法获取适用于你的开发板的寄存器值，用本文初提到的方法获取适用于你的单片机的启动文件)：

 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
  || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
  || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)

 #if defined(DATA_IN_ExtSRAM)
 /*-- GPIOs Configuration -----------------------------------------------------*/
    /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
   RCC->AHB1ENR   |= 0x00000078;
   /* Delay after an RCC peripheral clock enabling */
   tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);

   /* Connect PDx pins to FMC Alternate function */
   GPIOD->AFR[]  = 0x00CC00CC;
   GPIOD->AFR[]  = 0xCCCCCCCC;
   /* Configure PDx pins in Alternate function mode */
   GPIOD->MODER   = 0xAAAA0A0A;
   /* Configure PDx pins speed to 100 MHz */
   GPIOD->OSPEEDR = 0xFFFF0F0F;
   /* Configure PDx pins Output type to push-pull */
   GPIOD->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PDx pins */
   GPIOD->PUPDR   = 0x00000000;

   /* Connect PEx pins to FMC Alternate function */
   GPIOE->AFR[]  = 0xC00000CC;
   GPIOE->AFR[]  = 0xCCCCCCCC;
   /* Configure PEx pins in Alternate function mode */
   GPIOE->MODER   = 0xAAAA800A;
   /* Configure PEx pins speed to 100 MHz */
   GPIOE->OSPEEDR = 0xFFFFC00F;
   /* Configure PEx pins Output type to push-pull */
   GPIOE->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PEx pins */
   GPIOE->PUPDR   = 0x00000000;

   /* Connect PFx pins to FMC Alternate function */
   GPIOF->AFR[]  = 0x00CCCCCC;
   GPIOF->AFR[]  = 0xCCCC0000;
   /* Configure PFx pins in Alternate function mode */
   GPIOF->MODER   = 0xAA000AAA;
   /* Configure PFx pins speed to 100 MHz */
   GPIOF->OSPEEDR = 0xFF000FFF;
   /* Configure PFx pins Output type to push-pull */
   GPIOF->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PFx pins */
   GPIOF->PUPDR   = 0x00000000;

   /* Connect PGx pins to FMC Alternate function */
   GPIOG->AFR[]  = 0x00CCCCCC;
   GPIOG->AFR[]  = 0x00000C00;
   /* Configure PGx pins in Alternate function mode */
   GPIOG->MODER   = 0x00200AAA;
   /* Configure PGx pins speed to 100 MHz */
   GPIOG->OSPEEDR = 0x00300FFF;
   /* Configure PGx pins Output type to push-pull */
   GPIOG->OTYPER  = 0x00000000;
   /* No pull-up, pull-down for PGx pins */
   GPIOG->PUPDR   = 0x00000000;

 /*-- FMC/FSMC Configuration --------------------------------------------------*/
   /* Enable the FMC/FSMC interface clock */
   RCC->AHB3ENR         |= 0x00000001;

 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
    || defined(STM32F412Zx) || defined(STM32F412Vx)
   /* Delay after an RCC peripheral clock enabling */
   tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
   /* Configure and enable Bank1_SRAM3 */
   FSMC_Bank1->BTCR[4] = 0x00001091;
   FSMC_Bank1->BTCR[5] = 0x00100222;

4.在MDK把FSMC_NORPSRAM3映射的地址范围0x68000000~0x6BFFFFFF的首1M设为运行内存

把0x68000000、0x100000分别填入下图窗口右下角的"Read/Write Memory Areas"的”off-chip“的任一行：

5.修改完后Reuild

(注意：如果你用MDK-ARM以外的软件修改了前述的2个源文件，那么MDK-ARM可能不知道你修改了那2个文件，所以如果仅Build，那么IDE可能会拿编译旧版本的源文件得到的目标文件进行连接

或者你手动让MDK-ARM知道你修改过那些文件再仅Build，比如在MDK-ARM打开前述的2个源文件，在里面随便找个地方加个字再删掉那个字了再Build)

从MAP文件可以看到，变量被分配到了片外SRAM映射的地址范围0x68000000~0x68100000中，且单片机程序能正常

Exec Addr    Load Addr    Size         Type   Attr      Idx    E Section Name        Object

0x68000000   0x0800628c   0x00000008   Data   RW               .data               main.o
0x68000008   0x08006294   0x00000008   Data   RW              .data               stm32f4xx_hal_msp.o
0x68000010   0x0800629c   0x0000000c   Data   RW             .data               stm32f4xx_hal.o
0x6800001c   0x080062a8   0x00000004   Data   RW             .data               system_stm32f4xx.o
0x68000020   0x080062ac   0x00000004   Data   RW             .data               tftlcd.o
0x68000024        -       0x00000050   Zero   RW               .bss                main.o
0x68000074        -       0x0000000e   Zero   RW             .bss                tftlcd.o
0x68000082   0x080062b0   0x00000006   PAD
0x68000088        -       0x00000400   Zero   RW                STACK               startup_stm32f407xx.o

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希望CubeMX以后的版本能自动将片外RAM设为运存