lPC1788驱动SDRAM

Sdram型号为hy57v256

#ifndef __SRAM_H_

#define __SRAM_H_

#include "common.h"

#include "delay.h"

#include "stdlib.h"

#include "debugserial.h"

#define SDRAM_DEBUG

#define SDRAM_BASE_ADDR     0xA0000000

#define SDRAM_SIZE          0x10000000

#define MHZ                 *10000001

#define SYS_FREQ            60//MHZ

#if   SYS_FREQ == (120)

#define SDRAM_PERIOD          8.33  // 96MHz

#elif     SYS_FREQ == (96)

#define SDRAM_PERIOD          10.4  // 96MHz

#elif   SYS_FREQ == (72)

#define SDRAM_PERIOD          13.8  // 72MHz

#elif   SYS_FREQ == (60)

#define SDRAM_PERIOD          16.67  // 60MHz

#elif   SYS_FREQ == (57)

#define SDRAM_PERIOD          17.4  // 57.6MHz

#elif SYS_FREQ == (48)

#define SDRAM_PERIOD          20.8  // 48MHz

#elif SYS_FREQ == (36)

#define SDRAM_PERIOD          27.8  // 36MHz

#elif SYS_FREQ == (24)

#define SDRAM_PERIOD          41.7  // 24MHz

#elif SYS_FREQ == (12)

#define SDRAM_PERIOD          83.3  // 12MHz

#else

#error Frequency not defined

#endif

#define P2C(Period)           (((Period<SDRAM_PERIOD)?0:(uint32_t)((float)Period/SDRAM_PERIOD))+1)

#define SDRAM_REFRESH         7813

#define SDRAM_TRP             20

#define SDRAM_TRAS            45

#define SDRAM_TAPR            1

#define SDRAM_TDAL            3

#define SDRAM_TWR             3

#define SDRAM_TRC             65

#define SDRAM_TRFC            66

#define SDRAM_TXSR            67

#define SDRAM_TRRD            15

#define SDRAM_TMRD            3

void sdram_io_init(void);

void sdram_init(void);

u8 sdram_text(void);

#endif

#include "sdram.h"

void sdram_io_init(void)

{

/************** init SDRAM **********/

/* init EMC_CAS */

LPC_IOCON->P2_16 = 0x21;

/* init EMC_RAS */

LPC_IOCON->P2_17 = 0x21;

/* init EMC_CLK0 */

LPC_IOCON->P2_18 = 0x21;

/* init EMC_DYCS0 */

LPC_IOCON->P2_20 = 0x21;

/* init EMC_CKE0 */

LPC_IOCON->P2_24 = 0x21;

/* init EMC_DQM0 */

LPC_IOCON->P2_28 = 0x21;

/* init EMC_DQM1 */

LPC_IOCON->P2_29 = 0x21;

/* init EMC_DQM2 */

LPC_IOCON->P2_30 = 0x21;

/* init EMC_DQM3 */

LPC_IOCON->P2_31 = 0x21;

/************** init SDRAM DATA PIN**********/

/* init EMC_D0 */

LPC_IOCON->P3_0 = 0x21;

/* init EMC_D1 */

LPC_IOCON->P3_1 = 0x21;

/* init EMC_D2 */

LPC_IOCON->P3_2 = 0x21;

/* init EMC_D3 */

LPC_IOCON->P3_3 = 0x21;

/* init EMC_D4 */

LPC_IOCON->P3_4 = 0x21;

/* init EMC_D5 */

LPC_IOCON->P3_5 = 0x21;

/* init EMC_D6 */

LPC_IOCON->P3_6 = 0x21;

/* init EMC_D7 */

LPC_IOCON->P3_7 = 0x21;

/* init EMC_D8 */

LPC_IOCON->P3_8 = 0x21;

/* init EMC_D9 */

LPC_IOCON->P3_9 = 0x21;

/* init EMC_D10 */

LPC_IOCON->P3_10 = 0x21;

/* init EMC_D11 */

LPC_IOCON->P3_11 = 0x21;

/* init EMC_D12 */

LPC_IOCON->P3_12 = 0x21;

/* init EMC_D13 */

LPC_IOCON->P3_13 = 0x21;

/* init EMC_D14 */

LPC_IOCON->P3_14 = 0x21;

/* init EMC_D15 */

LPC_IOCON->P3_15 = 0x21;

/* init EMC_D16 */

LPC_IOCON->P3_16 = 0x21;

/* init EMC_D17 */

LPC_IOCON->P3_17 = 0x21;

/* init EMC_D18 */

LPC_IOCON->P3_18 = 0x21;

/* init EMC_D19 */

LPC_IOCON->P3_19 = 0x21;

/* init EMC_D20 */

LPC_IOCON->P3_20 = 0x21;

/* init EMC_D21 */

LPC_IOCON->P3_21 = 0x21;

/* init EMC_D22 */

LPC_IOCON->P3_22 = 0x21;

/* init EMC_D23 */

LPC_IOCON->P3_23 = 0x21;

/* init EMC_D24 */

LPC_IOCON->P3_24 = 0x21;

/* init EMC_D25 */

LPC_IOCON->P3_25 = 0x21;

/* init EMC_D26 */

LPC_IOCON->P3_26 = 0x21;

/* init EMC_D27 */

LPC_IOCON->P3_27 = 0x21;

/* init EMC_D28 */

LPC_IOCON->P3_28 = 0x21;

/* init EMC_D29 */

LPC_IOCON->P3_29 = 0x21;

/* init EMC_D30 */

LPC_IOCON->P3_30 = 0x21;

/* init EMC_D31 */

LPC_IOCON->P3_31 = 0x21;

/************** init SDRAM ADDR PIN**********/

/* init EMC_A0 */

LPC_IOCON->P4_0 = 0x21;

/* init EMC_A1 */

LPC_IOCON->P4_1 = 0x21;

/* init EMC_A2 */

LPC_IOCON->P4_2 = 0x21;

/* init EMC_A3 */

LPC_IOCON->P4_3 = 0x21;

/* init EMC_A4 */

LPC_IOCON->P4_4 = 0x21;

/* init EMC_A5 */

LPC_IOCON->P4_5 = 0x21;

/* init EMC_A6 */

LPC_IOCON->P4_6 = 0x21;

/* init EMC_A7 */

LPC_IOCON->P4_7 = 0x21;

/* init EMC_A8 */

LPC_IOCON->P4_8 = 0x21;

/* init EMC_A9 */

LPC_IOCON->P4_9 = 0x21;

/* init EMC_A10 */

LPC_IOCON->P4_10 = 0x21;

/* init EMC_A11 */

LPC_IOCON->P4_11 = 0x21;

/* init EMC_A12 */

LPC_IOCON->P4_12 = 0x21;

/* init EMC_A13 */

LPC_IOCON->P4_13 = 0x21;

/* init EMC_A14 */

LPC_IOCON->P4_14 = 0x21;

/************** init SDRAM WE PIN**********/

/* init EMC_WE */

LPC_IOCON->P4_25 = 0x21;

}

void sdram_init(void)

{

volatile u32 i;

volatile unsigned long Dummy;

LPC_SC->PCONP       |= (1<<11);//使能emc模块

//初始化IO

sdram_io_init();

//设置命令延迟时间 芯片数据手册上有标准

LPC_SC->EMCDLYCTL |= (8<<0);

//设置输入数据采样延迟

LPC_SC->EMCDLYCTL |=(8<<8);

//设置时钟输出延迟

LPC_SC->EMCDLYCTL |= (0x08 <<16);

//使能emc 正常地址映射 正常模式非低功耗模式

LPC_EMC->Control =1;

//读取配置设置为命令延迟策略

LPC_EMC->DynamicReadConfig = 1;

//设置ras延时为3个clk cas延时为3 以下设置都需要根据SDRAM数据手册来设置

LPC_EMC->DynamicRasCas0 = 0;

LPC_EMC->DynamicRasCas0 |=(3<<8);

LPC_EMC->DynamicRasCas0 |= (3<<0);

//设置预充电的时钟延迟 20us

LPC_EMC->DynamicRP = P2C(20);

//设置选中到预充电的命令周期 45us

LPC_EMC->DynamicRAS = P2C(45);

//设置自刷新退出时间

LPC_EMC->DynamicSREX = P2C(67);

//最后数据输出到有效命令时间

LPC_EMC->DynamicAPR = 1;

//选择数据到有效命令时间

LPC_EMC->DynamicDAL = SDRAM_TDAL+P2C(20);

//写入恢复时间 3

LPC_EMC->DynamicWR = 3;

//选择有效到有效命令周期

LPC_EMC->DynamicRC = P2C(65);

//选择自刷新周期

LPC_EMC->DynamicRFC = P2C(66);

//自刷新到有效命令时间

LPC_EMC->DynamicXSR = P2C(67);

//选择有效组A到组B的延时

LPC_EMC->DynamicRRD = P2C(15);

//装载模式寄存器到有效时间

LPC_EMC->DynamicMRD = 3;

//选择cs0的配置

/*4:3  = 00     = SDRAM

12:7 = 001001   = 128 Mb (8Mx16), 4 banks, row length = 12, column length = 9

14   = 1      = 32bit

0100 0100 1000 0000

32bit 128 Mb (8Mx16), 4 banks, row length = 12, column length = 9*/

LPC_EMC->DynamicConfig0 = 0x0004480;

//时钟受高电平驱动,clkout持续运行  发出nop命令

LPC_EMC->DynamicControl = 0x0183;

//等待一段时间让sdram启动

for(i= 200*40; i;i--);

//发布pall指令,预充电

LPC_EMC->DynamicControl = 0x0103;

//首先设置动态刷新周期为32个clk

LPC_EMC->DynamicRefresh = 2;

//等待至少128个clk

for(i= 256; i; --i); // > 128 clk

//设置新的动态刷新周期

LPC_EMC->DynamicRefresh = P2C(SDRAM_REFRESH) >> 4;

//发布mode指令

LPC_EMC->DynamicControl    = 0x00000083;

//进行一次伪读取

Dummy = *((volatile u32 *)(SDRAM_BASE_ADDR | (0x32<<13)));

// 进入normal模式 自刷新时钟禁止 空闲时钟禁止 正常操作非掉电

LPC_EMC->DynamicControl = 0x0000;

//使能芯片缓冲

LPC_EMC->DynamicConfig0 |=(1<<19);

for(i = 100000; i;i--);

}

u8 sdram_text(void)

{

u32 i;

volatile u32 *wr_ptr;

volatile u8 *char_wr_ptr;

wr_ptr = (u32 *)SDRAM_BASE_ADDR;

char_wr_ptr = (u8 *)wr_ptr;

for (i=0; i<(SDRAM_SIZE/4)/1024; i++)

{

*char_wr_ptr++ = 0x11;

*char_wr_ptr++ = 0x22;

*char_wr_ptr++ = 0x33;

*char_wr_ptr++ = 0x44;

}

wr_ptr = (u32 *)SDRAM_BASE_ADDR;

for ( i= 0; i < (SDRAM_SIZE/8)/1024; i++ )

{

if ( *wr_ptr != 0x44332211 )    /* be aware of endianess */

{

return 1;

}

wr_ptr++;

}

return 0;

}