-boot移植（十一）---代码修改---支持nandflash

一、移植前的修改

1.1 include/configs/jz2440修改

　　原来的定义：

　　

　　可以看出，要先定义CONFIG_CMD_NAND才能使能NANDFlash。

　　这个在我们文件中的82行有定义，所以不需要定义了。

　　

　　将里面的S3C2410全部改为S3C2440：

　　

1.2 drivers/mtd/nand/修改

　　拷贝s3c2410_nand.c 成  s3c2440_nand.c

　　

　　在此目录的makefile中添加 s3c2440_nand.c

　　

　　修改s3c2440_nand.c 文件，从board_nand_init 逐行检测修改，代码如下：

 #include <common.h>

 #include <nand.h>
 #include <asm/arch/s3c24x0_cpu.h>
 #include <asm/io.h>

 /* NFCONF 寄存器定义 */
 #define S3C2440_NFCONF_EN          (1<<15)
 #define S3C2440_NFCONF_512BYTE     (1<<14)
 #define S3C2440_NFCONF_4STEP       (1<<13)
 #define S3C2440_NFCONF_INITECC     (1<<12)
 #define S3C2440_NFCONF_nFCE        (1<<1)
 #define S3C2440_NFCONF_TACLS(x)    ((x)<<12)
 #define S3C2440_NFCONF_TWRPH0(x)   ((x)<<8)
 #define S3C2440_NFCONF_TWRPH1(x)   ((x)<<4)

 /* NFCONF 寄存器定义 */
 #define S3C2440_NFCONT_LOCKTIGHT                  (1<<13)
 #define S3C2440_NFCONT_SOFTLOCK                  (1<<12)
 #define S3C2440_NFCONT_ENLLLEGALINT              (1<<10)
 #define S3C2440_NFCONT_ENRnBINT                 (1<<9)
 #define S3C2440_NFCONT_Rn                         (1<<8)
 #define S3C2440_NFCONT_SPAREECCLOCK             (1<<6)
 #define S3C2440_NFCONT_MAINECCLOCK                 (1<<5)
 #define S3C2440_NFCONT_ECC                      (1<<4)
 #define S3C2440_NFCONT_nCE                      (1<<1)
 #define S3C2440_NFCONT_MODE                      (1<<0)

 #define S3C2440_ADDR_NALE 4
 #define S3C2440_ADDR_NCLE 8

 #ifdef CONFIG_NAND_SPL

 /* in the early stage of NAND flash booting, printf() is not available */
 #define printf(fmt, args...)

 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 {
     int i;
     struct nand_chip *this = mtd->priv;

     for (i = ; i < len; i++)
         buf[i] = readb(this->IO_ADDR_R);
 }
 #endif

 /* ctrl:表示做什么，选中芯片/取消片选，是发命令还是发地址
  * cmd :命令值或地址值
  */
 static void s3c24x0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
     struct s3c24x0_nand *nand = s3c24x0_get_base_nand();

     debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);

     if (ctrl & NAND_CLE) {
         /* 发命令 */
         writeb(cmd, &nand->nfcmd);
     }
     else if (ctrl & NAND_ALE) {
         /* 发地址 */
         writeb(cmd, &nand->nfaddr);
     }

 }

 /**
  * nand_select_chip - [DEFAULT] control CE line
  * @mtd: MTD device structure
  * @chipnr: chipnumber to select, -1 for deselect
  *
  * Default select function for 1 chip devices.
  */
 void s3c2440_nand_select(struct mtd_info *mtd, int chipnr)
 {
     struct s3c24x0_nand *nand = s3c24x0_get_base_nand();

     switch (chipnr) {
     case -: /* 取消选中 */
         nand->nfcont |= S3C2440_NFCONT_nCE;
         break;
     case : /* 选中 */
         nand->nfcont &= ~S3C2440_NFCONT_nCE;
         break;

     default:
         BUG();
     }
 }

 static int s3c24x0_dev_ready(struct mtd_info *mtd)
 {
     struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
     debug("dev_ready\n");
     return readl(&nand->nfstat) & 0x01;
 }

 #ifdef CONFIG_S3C2440_NAND_HWECC
 void s3c24x0_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 {
     struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
     debug("s3c24x0_nand_enable_hwecc(%p, %d)\n", mtd, mode);
     writel(readl(&nand->nfconf) | S3C2440_NFCONF_INITECC, &nand->nfconf);
 }

 static int s3c24x0_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
                       u_char *ecc_code)
 {
     struct s3c24x0_nand *nand = s3c24x0_get_base_nand();
     ecc_code[] = readb(&nand->nfecc);
     ecc_code[] = readb(&nand->nfecc + );
     ecc_code[] = readb(&nand->nfecc + );
     debug("s3c24x0_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
           mtd , ecc_code[], ecc_code[], ecc_code[]);

     return ;
 }

 static int s3c24x0_nand_correct_data(struct mtd_info *mtd, u_char *dat,
                      u_char *read_ecc, u_char *calc_ecc)
 {
     if (read_ecc[] == calc_ecc[] &&
         read_ecc[] == calc_ecc[] &&
         read_ecc[] == calc_ecc[])
         return ;

     printf("s3c24x0_nand_correct_data: not implemented\n");
     return -;
 }
 #endif

 int board_nand_init(struct nand_chip *nand)
 {
     u_int32_t cfg = ;
     u_int8_t tacls, twrph0, twrph1;
     struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
     struct s3c24x0_nand *nand_reg = s3c24x0_get_base_nand();

     writel(readl(&clk_power->clkcon) | ( << ), &clk_power->clkcon);

     /* 时序设置 */
     tacls = ;
     twrph0 = ;
     twrph1 = ;

     /* 初始化时序 */
     cfg |= S3C2440_NFCONF_TACLS(tacls - );
     cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - );
     cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - );
     writel(cfg, &nand_reg->nfconf);

     /* 使能NANDFLASH控制器，初始化ECC，禁止片选 */
     writel(S3C2440_NFCONT_MODE | S3C2440_NFCONT_nCE | S3C2440_NFCONT_ECC, &nand_reg->nfcont);

     /* initialize nand_chip data structure */
     nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
     nand->IO_ADDR_W = (void *)&nand_reg->nfdata;

     nand->select_chip = s3c2440_nand_select;

     /* hwcontrol always must be implemented */
     nand->cmd_ctrl = s3c24x0_hwcontrol;

     nand->dev_ready = s3c24x0_dev_ready;

 #ifdef CONFIG_S3C2410_NAND_HWECC
     nand->ecc.hwctl = s3c24x0_nand_enable_hwecc;
     nand->ecc.calculate = s3c24x0_nand_calculate_ecc;
     nand->ecc.correct = s3c24x0_nand_correct_data;
     nand->ecc.mode = NAND_ECC_HW;
     nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
     nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
     nand->ecc.strength = ;
 #else
     nand->ecc.mode = NAND_ECC_SOFT;
 #endif

 #ifdef CONFIG_S3C2440_NAND_BBT
     nand->bbt_options |= NAND_BBT_USE_FLASH;
 #endif

     return ;
 }

　　修改过程如下：

 u-boot-2016.05\common\board_r：board_init_r函数中的初始化序列init_sequence_r中的：
 initr_nand
     nand_init
         nand_init_chip
             board_nand_init
                 设置nand_chip结构体, 提供底层的操作函数
             nand_scan
                 nand_scan_ident
                     nand_set_defaults
                         chip->select_chip = nand_select_chip;
                         chip->cmdfunc = nand_command;
                         chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;

                     nand_get_flash_type
                         chip->select_chip
                         chip->cmdfunc(mtd, NAND_CMD_RESET, -, -);
                                 nand_command()  // 即可以用来发命令，也可以用来发列地址(页内地址)、行地址(哪一页)
                                     chip->cmd_ctrl
                                             s3c24x0_hwcontrol

                         chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -);
                         *maf_id = chip->read_byte(mtd);
                         *dev_id = chip->read_byte(mtd);

　　编译运行 结果如下：

　　

　　测试：

　　执行写，在写之前注意一定要先擦除nandflash：

　　将 SDRAM 的 0x31e00000 地址的 0xff 字节数据写到 NAND FLASH 的 0 地址

　　

　　执行读：从 NAND FLASH 的 0 地址读 0xff 字节数据到 SDRAM 的 0x31f00000 地址

　　

　　比较：