http://www.freelabs.com/~whitis/electronics/jtag/ One of the big issues in making a JTAG pod is level translation. The state of level translation ICs leaves a LOT to be desired. You would think that there would be a lot of chips that you could apply…

JTAG Finder Figuring out the JTAG Pinouts on a Device is usually the most time-consuming and frustrating process and Finding the pinouts for these ports allows you to access with correct JTAG Devices likeGPG ORT,  and JTAG Finder helps you to get sta…

XAPP906 Supporting Multiple SD Devices with CoolRunner-II CPLDs There has been an increasing demand to add multiple Secure Digital (SD) devices in a single system. Whether the system application calls for a combination of SD memory ports, 802.11 SDIO…

Driver Amplifiers For Analog-To-Digital Converters What amplifiers are used to drive analog-to-digital converters (ADCs)? Possibilities include single-ended and differential inputs and outputs, plus voltage feedback (VFB) or current feedback (CFB) in…

http://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm CMSIS-DAP is the interface firmware for a Debug Unit that connects the Debug Port to USB. Debuggers, which execute on a host computer, connect via USB to the Debug Unit and to th…

网址:http://blog.csdn.net/zhou1232006/article/details/6150198 在基于ARM的嵌入式应用系统中,存储系统通常是通过系统控制协处理器CP15完成的.CP15包含16个32位的寄存器,其编号为0~15. 访问CP15寄存器的指令 MCR   ARM寄存器到协处理器寄存器的数据传送 MRC   协处理器寄存器到ARM寄存器的数据传送 MCR指令和MRC指令只能在处理器模式为系统模式时执行,在用户模式下执行MCR指令和MRC指令将会触发未定义指令的…

//================================================================================= // ARM SWD Mode Port Bit masks // #if (HW_CAPABILITY&CAP_SWD_HW) #ifndef DATA_PORT #define DATA_PORT PTAD #define DATA_PORT_DDR PTADD #define DATA_PORT_PER PTAPE #end…

The mbed HDK and mbed-enabled hardware support the CMSIS-DAP debug interface, which consists of an abstraction of the Cortex Debug Access Port (DAP) command set over a driver-less USB HID connection. This provides a USB connection to the DAP that maj…

74HC245/74HCT245 The 74HC245; 74HCT245 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC245; 74HCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send an…

一.前言 本文没有什么框架性的东西,就是按照__create_page_tables代码的执行路径走读一遍,记录在初始化阶段,内核是如何创建内核运行需要的页表过程.想要了解一些概述性的.框架性的东西可以参考内存初始化文档. 本文的代码来自ARM64,内核版本是4.4.6,此外,阅读本文最好熟悉ARMv8中翻译表描述符的格式. 二.create_table_entry 这个宏定义主要是用来创建一个中间level的translation table中的描述符.如果用linux的术语,就是创建PGD.…