FPGA基础入门程序代码

 module flow_led(
     input               sys_clk  ,  //系统时钟，外部时钟50M
     input               sys_rst_n,  //系统复位，低电平有效

     output  reg  [:]  led         //4个LED灯
     );

 //reg define
 reg [:] counter;
 /*点灯如何实现？首先定义led4位寄存器，对应四个接口。灯接法共地，输出高电平(1)点亮一个灯。
    如何循环点亮灯?led <= 4'b0001;即        led[0]=1
                                         led[1]=0
                                         led[2]=0
                                         led[3]=0

     执行一次{led[2:0],led[3]}取高位与低位拼接,得led<=4'b0010

     延时如何实现？首先理解在FPGA的always块是并行执行，但是在always中是顺序执行,即counter == 24'd1000_0000时(24位十进制数)
      counter <= 24'd0;

      led[3:0] <= {led[2:0],led[3]};

     */
 //*****************************************************
 //**                    main code
 //***************************************************** 

 //计数器对系统时钟计数，计时0.2秒
 /*
     t=1/f=1/50,000,000
     0.2s=t*10000,0000

     */
 always @(posedge sys_clk or negedge sys_rst_n) begin
     if (!sys_rst_n)
         counter <= 'd0;
     else if (counter < 'd1000_0000)
         counter <= counter + 'b1;
     else
         counter <= 'd0;
 end

 //通过移位寄存器控制IO口的高低电平，从而改变LED的显示状态
 always @(posedge sys_clk or negedge sys_rst_n) begin
     if (!sys_rst_n)
         led <= 'b0001;
     else if(counter == 'd1000_0000)
         led[:] <= {led[:],led[]};
     else
         led <= led;
 end

 endmodule