Digital potentiometers, such as Analog Devices’ AD5160, make excellent digitally controlled voltage dividers in applications in which 8-bit resolution is acceptable. This Design Idea shows how to use a CMOS DAC as a voltage divider in applications re…
http://electronicdesign.com/print/passives/fixed-dc-dc-regulator-output-uses-digitally-controlled-potentiometer Electronic Design Tamara Schmitz Thu, 2009-10-01 (All day) Digitally controlled potentiometers (DCPs) have become very popular in a wide v…
A variable resistor that integrates a programmable, temperature-indexed look-up table can compensate for the temperature drift of a voltage regulator. In this case, the look-up table can change the resistance every 2°C over a range of –40 to +102°C,…
TTL電路是晶體管-晶體管邏輯電路的英文縮寫(Transister-Transister-Logic ),是數字集成電路的一大門類.它采用雙極型工藝制造,具有高速度低功耗和品種多等特點. CMOS是:金屬-氧化物-半導體(Metal-Oxide-Semiconductor)結構的晶體管簡稱MOS晶體管,有P型MOS管和N型MOS管 之分.由 MOS管構成的集成電路稱為MOS集成電路,而由PMOS管和NMOS管共同構成的互補型MOS集成電路即為 CMOS-IC( Complementary MOS…
LDO Regulator High accuracy voltage regulator Vout = 2.5V * (1 + ( 5.6 / 6.8 ) ) = 4.55V Recently the author had to adapt  a standard circuit configuration  (which often uses an npn bipolar) so as to operate as a low-dropout (LDO) regulator. The circ…
参考: 1.https://baike.baidu.com/item/TTL%E7%94%B5%E5%B9%B3/5904345 2.https://baike.baidu.com/item/CMOS%E7%94%B5%E5%B9%B3/10890242 TTL电平 编辑 锁定 讨论999   TTL电平信号规定,+5V等价于逻辑"1",0V等价于逻辑"0"(采用二进制来表示数据时).这样的数据通信及电平规定方式,被称做TTL(晶体管-晶体管逻辑电平)信号系统.这是…
http://e2e.ti.com/blogs_/b/analogwire/archive/tags/DAC%2bEssentials DAC Essentials: A new blog series A digital-to-analog converter, or DAC, performs the opposite function of an analog-to-digital converter, or ADC. Duh, right? But, have you ever wond…
Adding Digital control to Dual tracking LM317 / LM337 Bench supply I've been working on my own idea for a digitally controlled power supply over the last couple of weeks, originally using a MIC29302 which didn't look too bad, and a handful of DACs an…
Building a Differential Amplifier An op-amp with no feedback is already a differential amplifier, amplifying the voltage difference between the two inputs. However, its gain cannot be controlled, and it is generally too high to be of any practical us…
http://www.edn.com/design/analog/4337128/Make-a-DAC-with-a-microcontroller-s-PWM-timer Many embedded-microcontroller applications require generation of analog signals. An integrated or stand-alone DAC fills the role. However, you can often use PWM si…
http://sourceforge.net/projects/openprogrammer/?source=navbar Open Programmer http://openprog.altervista.org/OP_eng.html#Quick Open Programmer v0.8.x Quick facts Completely free and Open Source (including firmware) Programs PIC10-12-16-18-24, dsPIC30…
BACKGROUND OF THE INVENTION The present invention relates to a semiconductor integrated circuit device having a PN Vt balance compensation circuit for compensating a threshold voltage difference between a PMOS transistor and an NMOS transistor and ca…
The OFIFG flag always set in my recent MSP430 smoke device project. In this A sample hardware, there is no external LFXT1CLK low-frequency/high-frequency oscillator, also there is no XT2CLK. It uses the internal digitally controlled oscillator (DCO).…
这是由TI公司推出的一款比較单片机, 相对stm32来说简单些, 由于它是16位的,  所以我们在学习中可能也会像51一样,  直接操纵寄存器. TI设计这款单片机的初衷是, 让它用于低功耗的嵌入式设备中. watermark/2/text/aHR0cDovL2Jsb2cuY3Nkbi5uZXQvcXFfMjE5NzA4NTc=/font/5a6L5L2T/fontsize/400/fill/I0JBQkFCMA==/dissolve/70/gravity/Center" alt="&…
在前面教程的基础上继续移植优化,之前的没有加缓冲区,没有接收函数功能,这里进行统一的讲解                            作者:恒久力行  qq:624668529 缓冲区对于接受来说很有必要,为了数据的稳定性和实时性必须要加上缓冲.没有缓冲很容易造成数据丢失 一:利用之前移植好的工程,在其基础上进行改动  1.将两个文件mavlink_usart_fifo.h  mavlink_usart_fifo.c添加到工程里(都是关于缓冲区的底层串口加缓冲区函数)  mavlink…
本文转自:Vivado使用技巧(12):设置DCI与内部参考电压 - 灰信网(软件开发博客聚合) (freesion.com) DCI与内部参考电压 Xilinx FPGA提供了DCI(Digitally Controlled Impedance)技术,包括两个功能:(1).控制驱动器的输出阻抗:(2).为驱动器或发送器添加一个并行端接,在传输线上得到精确的特征阻抗匹配,以提高信号完整性.DCI会主动调整I/O bank内的阻抗,以调整放在VRN和VRP管脚之间的外部精准参考电阻,这样可以补偿由…
Transistor Tutorial Summary Transistor Tutorial Summary Bipolar Junction Transistor Tutorial We can summarise this transistors tutorial section as follows: The Bipolar Junction Transistor (BJT) is a three layer device constructed form two semiconduct…
http://www.powerguru.org/changing-the-output-voltage-of-a-switching-regulator-on-the-fly/ There are many different ways to change the output voltage Applications that require the output voltage of a power supply to change dynamically come from a wide…
http://forum.eet-cn.com/thread!printPreview.jspa?threadID=1200029698&start=0 以245为例,74AC245.74HC245.74AHC245.74ACT245.74LS245这几个有什么区别,各自的应用领域是什么? 这些逻辑电平对应的英文含义如下: S -  Schottky Logic LS -  Low-Power Schottky Logic CD4000 - CMOS Logic 4000 AS -  Advan…
http://pdfserv.maximintegrated.com/en/an/AN818.pdf http://www.maximintegrated.com/app-notes/index.mvp/id/818 Digital Adjustment of DC-DC Converter Output Voltage in Portable Applications Abstract: This tutorial discusses methods for digitally adjusti…
DIGITALLY ADJUSTABLE BOOST CONVERTER The TPS61045 is a high frequency boost converter with digitally programmable output voltage and true shutdown. During shutdown, the output is disconnected from the input by opening the internal input switch. This…
reprint from:http://blog.csdn.net/hemeinvyiqiluoben/article/details/9253249 TTL和COMS电平匹配以及电平转换的方法 一.TTL TTL集成电路的主要型式为晶体管-晶体管逻辑门(transistor-transistor logic gate),TTL大部分都采用5V电源. 1.输出高电平Uoh和输出低电平Uol Uoh≥2.4V,Uol≤0.4V 2.输入高电平和输入低电平 Uih≥2.0V,Uil≤0.8V 二.C…
TTL电平和CMOS电平总结 1,TTL电平:          输出高电平>2.4V,输出低电平<0.4V.在室温下,一般输出高电平是3.5V,输出低电平是0.2V.最小输入高电平和低电平:输入高电平>=2.0V,输入低电平<=0.8V,噪声容限是0.4V. 2,CMOS电平: 1逻辑电平电压接近于电源电压,0逻辑电平接近于0V.而且具有很宽的噪声容限. 3,电平转换电路:          因为TTL和COMS的高低电平的值不一样(ttl 5v<==>cmos 3.…
http://www.cypress.com/knowledge-base-article/interfacing-sram-jtag-signals-using-voltage-level-shifter-kba81536 As a best practice, avoid use of level-shifting ICs with open-drain output. This type of level-shifter requires a resistive pull-up to ac…
High accuracy voltage regulator Good morning everybody, I want to make a accurate voltage regulator based on the Basic Stamp.Total range 0-10 V and a resolution of eg 5 mV. So this means 2000 steps.Maximum current around 250 mA. I tried to do somethi…
CMOS集成电路的基本结构是以P型材料作为衬底(p-substrate),直接生成NMOS, 同时增加N肼(n-well),在其上制造PMOS. 增加两个bulk(P+,N+)防止非MOS管内的PN结反偏. NMOS一般放在Pull-down结构中,PMOS一般放在Pull-up结构中. NMOS与PMOS均采用增强型的类型,这样便于控制channel length. Bulk端和Gate,Source,Drain通过metal层引出. 在基本的invert中,NMOS的Drain与PMOS的S…
1.USB:电脑的USB口信号时USB信号,为差分信号,电压范围:+400mV~-400mV间变化:直流电压5V 驱动电流500MA 2.232电平: 逻辑1(MARK)=-3V--15V 逻辑0(SPACE)=+3-+15V 3.485电平: 它是差分信号,两信号线 +2V-+6V表示“0”, - 6V-- 2V表示“1”. 4.TTL电平: 一般输出高电平是3.5V,输出低电平是0.2V. 5.CMOS  : 门闩值为0.3VCC和0.7VCC,比如对于5V供电器件,分别为1.5V和3.5V…
CMOS logic is a newer technology, based on the use of complementary MOS transistors toperform logic functions with almost no current required. [1] This makes these gates very useful inbattery-powered applications. The fact that they will work with su…
BACKGROUND Embodiments of the invention relate to the field of electronic systems and power management. More particularly, embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. As the trend toward adv…
Minimizing the overall power conservation in a symmetric multiprocessor system disposed in a system-on-chip (SoC) depends on using voltage islands operated at different voltages such that similar circuits will perform at significantly different level…